Phase-Locked Loop and Frequency Synthesis Design

Course 236

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Summary

This two-day course provides the practical knowledge necessary to design frequency synthesis circuits and systems using phase-locked loops and related technologies. Coverage includes each of the basic building blocks that are used in phase locked oscillators and frequency synthesizers. Understanding how each block operates will give you an appreciation for its impact on the overall performance of the oscillator with respect to phase noise and tuning range/lock time, among other factors.

Learning objectives

Upon completing the course you will be able to:

  • Describe the theory of operation for PLL, DAS, and DDS frequency synthesis techniques.
  • Develop and explain principles and uses of PLL components including mixers, phase detectors, oscillators, and dividers.
  • Examine limitations of real world components, design tradeoffs and their effect on PLL performance.
  • Develop and analyze more advanced frequency synthesis systems designs.
  • Test PLL circuits and systems to verify design integrity.

Target Audience

Engineers designing, specifying, or new to PLL frequency synthesis circuits and systems will benefit from this course. Prerequisites include basic digital circuit design, analog design skills including transfer functions, and basic control loops.

Outline

Day One

Frequency Synthesis
 • History from test and measurement perspective • Direct and indirect frequency synthesis • Performance requirements
Direct Analog Synthesis (DAS)
 • Oscillator combinations • Harmonics, multiplication and division • Divide-and-mix • Spurious signals • Noise • Specifying the reference • Example • the Synthesizer Equation
Indirect Frequency Synthesis
 • Stability transfer • Frequency lock • Phase lock
PLLs: Basic Model and Analysis
 • Block diagrams • Laplace transfer function and linearized model; loop types and orders • Loop filters • Open and closed loop gain; Bode plots; phase and gain margin • stability and transient times • Acquisition, lock and hold in range • Frequency modulation (FM) problems and solutions • Sampling effects • Calculation of transfer functions and time domain response • Nonlinear modeling/simulation
Phase Detectors
 • General principles • Mixer • Sample and hold, microwave samplers • Digital options • the phase-frequency detector • Charge pumps
Dividers
 • Pre-scalers: single, dual, and multiple modulus • Noise floor • input impedance variation • power supply phase modulation (PSPM)
Oscillators
 • Feedback and negative resistance structures • Delay oscillators • Reference types • Inductor issues • pulling and pushing effects • injection locking and field feedback • General noise characteristics • VCO characterization

Day Two

PLL Synthesizer Design Techniques
 • Important parameters and hierarchy • loop filter types, active and passive • Loop filter design functions • MS Excel worksheet • stability while managing wide component variations • component value tolerance • Acquisition of lock • divider value minimization
Phase Noise and Spurs
 • Phase noise components • reference noise • divider noise • PD noise and FOM • VCO noise • Loop filter noise • Modeling PLL noise using MS Excel • measuring PLL noise floor • noise variations with loop bandwidth • reference sidebands: causes and solution options • reduction of loop filter noise
Fractional-N PLL
 • Basic principles • inherent spurious mechanism • fractional-N implementation techniques • sigma-delta benefits and consequences • addressing fractional N spurs
Direct Digital Synthesis (DDS)
 • Numeric oscillator • square vs. sine waveforms • spurious signal causes and their minimization • spur diagnosis methods
Synthesis Technique Combinations
 • Synthesizer equations • DAS + PLL • DAS + DDS • DDS + PLL • DAS + DDS + PLL • Multiple loops • Increasing frequency range
Testing Techniques
 • Phase noise measurement details • Switching speed • Loop dynamics validation